1. Field of the Invention
The present invention relates to multi-output DC-DC converters and electronic apparatus using a multi-output DC-DC converter.
2. Description of the Related Art
FIG. 5 is a circuit diagram of a conventional multi-output DC-DC converter. In FIG. 5, a multi-output DC-DC converter 1 comprises a DC-DC converter circuit 2, and rectifying circuits 3 and 4.
The DC-DC converter circuit 2 comprises a DC power supply V1 having an output voltage Vin; a capacitor C1 connected in parallel to the DC power supply V1; a choke coil L1 and an FET Q1 serving as a switching device, connected in series between the DC power supply V1 and an output terminal P1; a diode D1 serving as a flywheel rectifying device connected between the ground and the connection point of the FET Q1 and the choke coil L1; and a capacitor C2 serving as a smoothing capacitor connected between the output terminal P1 and the ground. The gate of the FET Q1 is connected to a control circuit (not shown) and the FET Q1 is on-off-controlled by a switching signal input from the control circuit. The control circuit detects a voltage Vout at the output terminal P1 and feeds it back to set the switching frequency and the pulse width of the FET Q1, so that the voltage Vout at the output terminal P1 is stabilized. The output at the output terminal P1 serves as a first output.
The connection point of the FET Q1 and the choke coil L1 in the DC-DC converter circuit 2 is connected to the rectifying circuits 3 and 4. The rectifying circuit 3 is a double-voltage rectifying circuit comprising of two diodes and two coupling capacitors, and the output thereof is connected to an output terminal P2. The rectifying circuit 4 is a quadruple rectifying circuit formed of four diodes and four coupling capacitors, and the output thereof is connected to an output terminal P3. Two outputs that are twice and four times as high as the first output P1 are obtained from the output terminals P2 and P3.
FIG. 6 shows the waveforms of the source voltage Vs (voltage obtained at the connection point of the FET Q1 and the choke coil L1) of the FET Q1, serving as a switching device, and a current Ic flowing through the choke coil L1 when the load current of the first output varies. FIG. 6(a) and FIG. 6(b) show the source voltage Vs and the current Ic obtained when the load current is sufficiently high (at a heavy load or at a normal load), FIG. 6(c) and FIG. 6(d) show the source voltage Vs and the current Ic obtained when the load current is lower (at a normal load), and FIG. 6(e) and FIG. 6(f) show the source voltage Vs and the current Ic obtained when the load current is very low (at a light load or at no load).
As shown in FIG. 6(a) and FIG. 6(b), when the load current of the first output is high, the source voltage Vs becomes equal to the voltage Vin of the DC power supply V1 when the FET Q1 is on and the current Ic increases. When the FET Q1 goes off, the current Ic flows from ground to the choke coil L1 through the diode D1 by the excited energy of the choke coil L1. The current Ic decreases as the excited energy of the choke coil L1 is reduced. Since the excited energy is large, the current Ic does not reach zero until the FET Q1 is turned on next time. During this period, the source voltage Vs of the FET Q1 is lower than the ground voltage by the voltage drop caused by the diode D1.
As shown in FIG. 6(c) and FIG. 6(d), when the load current of the first output becomes lower, since the excited energy of the choke coil L1 becomes smaller, the current Ic is zero for a period between when the FET Q1 is turned off and when the FET Q1 is turned on next time. In other words, the period when the diode D1 is on is reduced. When the current Ic flowing through the choke coil L1 becomes zero, the source voltage Vs of the FET Q1 is equal to the output voltage Vout of the first output.
As shown in FIG. 6(e) and FIG. 6(f), when the load current of the first output is further smaller or becomes zero, the ON time of the diode D1 is further reduced and the source voltage Vs of the FET Q1 does not lower to the ground voltage or less and is above the ground voltage.
The rectifying circuits 3 and 4 of the DC-DC converter 1 shown in FIG. 5 output voltages corresponding to the amplitudes of an input voltage because they have coupling-capacitor-input structures.
When the load current of the first output becomes very low as shown in FIG. 6(e), the difference between the maximum value and the minimum value of the amplitude of a voltage input to the rectifying circuits 3 and 4, namely, the source voltage Vs of the FET Q1 becomes small. Therefore, the rectifying circuits 3 and 4 do not operate as intended, and the voltages of the second outputs obtained at the output terminals P2 and P3 are reduced.
The lower the load current of the first output becomes, the shorter the ON time of the diode D1 is and the longer the time is during which the source voltage Vs is equal to the output voltage Vout of the first output, and therefore, the time during which the source voltage Vs shows the minimum value becomes relatively shorter within one switching period. When the time during which the source voltage Vs shows the minimum value is reduced even if the time during which the source voltage Vs shows the maximum value does not change, the rectifying circuits 3 and 4 cannot be made to operate efficiently. Also in terms of this point, it is difficult to take out electric power from the second outputs.
The present invention has been made in consideration of the above conditions. It is an object of the present invention to provide a multi-output DC-DC converter which, when a second output is obtained by using the pulse voltage of the DC-DC converter circuit used for obtaining a first output, prevents a reduction in the output voltage of the second output even when the load current of the first output becomes very low, and an electronic apparatus using the multi-output DC-DC converter.
The foregoing and other objects are achieved according to the present invention through the provision of a multi-output DC-DC converter including a step-down DC-DC converter circuit which includes a switching device for switching an input DC voltage to convert it to a pulse voltage, a choke coil and a smoothing capacitor for smoothing the pulse voltage to obtain a first output lower than the input DC voltage, and a flywheel rectifying device for causing a current to flow through the choke coil when the switching device is off; and a rectifying circuit for processing and rectifying the pulse voltage of the DC-DC converter circuit to obtain a second output, wherein the rectifying device is a bi-directional synchronous rectifying device which is turned on when the switching device is off.
In the multi-output DC-DC converter, the choke coil may be a transformer of which the secondary winding is connected to the rectifying circuit.
In the multi-output DC-DC converter, the rectifying circuit may comprise a coupling capacitor and a diode.
An electronic apparatus according to the present invention has one of the multi-output DC-DC converters described above.
Since one of the above structures is used, a multi-output DC-DC converter according to the present invention prevents a reduction in the output voltage of the second output even if the load current of the first output becomes very low.